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Технология
Вакансии DDR
21 вакансия с тегом «DDR»
O
openai
Electrical Engineer
San Francisco
PCIe
DDR
Ethernet
1d
→
G
graphcore
Senior
UEFI Firmware Engineer
Austin, Texas, United States
UEFI
TianoCore
C
4d
→
G
graphcore
Senior
Hardware Validation Engineer
Austin, Texas, United States
PCIe
USB
Ethernet
4d
→
G
Graphcore
Senior
Bring-Up and Characterization Engineer
Office
·
Bengaluru
Python
JMP
PCIe
5d
→
G
graphcore
Hardware Development Engineer
Bristol, UK
Digital circuit design
DCDC regulators
Ethernet
6d
→
G
Graphcore
Lead
Director of Characterisation
Office
·
Bristol
SoC
PCIe
Ethernet
1w
→
G
Graphcore
Lead
Bring-up & Characterisation Engineer
Office
·
Bristol
PCIe
Ethernet
DDR
1w
→
G
Graphcore
Senior
DDR & Execution Validation Engineer
Office
·
Bengaluru
DDR
HBM
C
1w
→
G
Graphcore
Senior
Debug Validation Engineer
Office
·
Bengaluru
Python
C
Linux
1w
→
G
Graphcore
Lead
UEFI Firmware Engineer
Office
·
Austin
UEFI
TianoCore
C
1w
→
G
Graphcore
Hardware Development Engineer
Office
·
Bristol
Python
Bash
Linux
1w
→
G
Graphcore
Signal Integrity Engineer
Office
·
Bristol
ANSYS SIWave
HFSS
HyperLynx
1w
→
G
Graphcore
Senior
SoC Architect
Office
·
Bristol
SoC Architecture
RTL
Verilog
1w
→
G
Graphcore
Signal Integrity Measurement Engineer
Austin, Texas
VNA
PNA
TDR
1w
→
S
SonicWall
Senior
Hardware Design Engineer
Office
·
Taipei
PCB Design
Cadence Allegro
Signal Integrity
2w
→
G
Graphcore
Lead
System Tests & Diagnostics Engineer
Office
·
Austin
Python
C++
Linux
2w
→
G
Graphcore
Senior
Post Silicon Validation Engineer
Office
·
Austin, Texas
C/C++
Python
Linux
$13,050–$17,650
USD · MONTH · 2w
→
G
Graphcore
Lead
Director of Post-Silicon Validation
Office
·
Austin, Texas
C++
Python
Linux
2w
→
G
Graphcore
Senior
Signal Integrity Engineer
Austin, Texas, United States
PCIe
Ethernet
DDR
2w
→
G
Graphcore
Senior
Software Engineer
Hybrid
·
Bristol
Firmware
Embedded Systems
I2C
4w
→
G
Graphcore
Senior
Signal Integrity Engineer
Bristol
ANSYS SIWave
HFSS
Mentor HyperLynx
4w
→
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