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Вакансии uvm

11 вакансий с тегом «uvm»

CSCerebras SystemsMiddle
Design Verification Engineer
Office·Sunnyvale, CA
SystemVerilogDPIUVM
$15,850–$19,150
USD · MONTH · 1d
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CSCerebras SystemsSenior
Design Verification Engineer
Office·Sunnyvale, CA
SystemVerilogUVMDPI
$20,850–$25,000
USD · MONTH · 1d
→
CSCerebras SystemsSenior
Design Verification Engineer
Office·Sunnyvale, CA
SystemVerilogUVMDPI
$18,750–$22,500
USD · MONTH · 1d
→
OopenaiMiddle
Design Verification Engineer
San Francisco
SystemVerilogUVMVCS
1d
→
Aanthropic
Research Engineer
Hybrid·San Francisco, CA
Reinforcement LearningRTLASIC
$41,650–$70,850
USD · MONTH · 5d
→
GGraphcoreLead
Director
Bristol
SystemVerilogPythonC++
1w
→
GGraphcoreLead
Silicon Verification Engineer
Office·Bengaluru
SystemVerilogPythonC++
1w
→
JjobgetherMiddle
FPGA Engineer
Remote·India
VerilogSystemVerilogVHDL
$100,000–$166,650
USD · MONTH · 2w
→
GGraphcoreSenior
Silicon Verification Engineer
Office·Bengaluru
SystemVerilogPythonC++
2w
→
JjobgetherSenior
ASIC Design Verification Engineer
Remote·Canada
VerilogSystemVerilogUVM
3w
→
GgraphcoreSenior
Silicon Verification Engineer
Bristol, UK; Cambridge, UK
UVMSVASystemVerilog
4w
→
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