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Вакансии UVM

13 вакансий с тегом «UVM»

OOpenAI
Design Verification Engineer
Office·San Francisco
SystemVerilogUVMVCS
1w
→
CCerebrasMiddle
Design Verification Engineer
Office·Sunnyvale, CA
SystemVerilogUVMDPI
$15,850–$19,150
USD · MONTH · 1w
→
CCerebrasLead
Design Verification Engineer
Office·Sunnyvale, CA
SystemVerilogUVMDPI
$20,850–$25,000
USD · MONTH · 1w
→
SSandiskSenior
ASIC Development Engineer
Office·Bengaluru
SystemVerilogUVMFPGA
1w
→
Ggraphcore
Silicon Verification Engineer
Office·Bengaluru, India
System VerilogPythonC++
1w
→
Ggraphcore
Silicon Verification Engineer
Bristol, UK; Cambridge, UK
UVMSVASystemVerilog
2w
→
SSandiskSenior
ASIC Digital Engineer
Office·Bengaluru
SystemVerilogUVMC
2w
→
JjobgetherSenior
Design Verification Engineer
Remote·India
SystemVerilogUVMPCIe
2w
→
SSandiskSenior
Staff ASIC Digital Engineer
Office·Bengaluru
CSystemVerilogUVM
2w
→
SSandiskSenior
Staff Engineer, VLSI Design Engineering
Office·Bengaluru, India
UVMSystemVerilogVerilog
3w
→
SSandiskSenior
Staff Engineer, VLSI Design Engineering
Office·Bengaluru
SOC VerificationUVMSystemVerilog
4w
→
SsandiskMiddle
ASIC Verification & Validation Engineer
Office·Bengaluru
CSystem VerilogUVM
1mo
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SSandiskSenior
ASIC Digital Engineer
Office·Bengaluru
ASICUVMSystemVerilog
1mo
→
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