About the company
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.
Responsibilities
- RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure
- Balance design trade-offs with modularity, scalability, power, area, and performance.
- Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
- Participating in Post-Si evaluation and debug
- Drive cross function support for productization
- Technical guidance and mentoring of junior engineers
Requirements
- MSEE plus 6-8 years of relevant experience
- Experience with chip level integration, chip lead, and full product life cycle (requirements, design, implementation, test) of Logic design
- Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, static timing analysis, physical verification)
- Working knowledge of NAND flash memory cell device operations, algorithms for program/read/erase