This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Principal Embedded Firmware Engineer — AI/HPC Networking Silicon based in the United States.
As a Principal Embedded Firmware Engineer, you will shape the firmware architecture powering next-generation networking silicon for AI and high-performance computing (HPC) infrastructure. You will lead the development of bare-metal firmware responsible for securely booting, provisioning, and supervising on-chip acceleration engines across complex, multi-die systems. Your work will establish the reliable infrastructure required to support demanding compute workloads at scale. Collaborating closely with ASIC, RTL, and software engineering teams, you will define hardware/software interfaces, strengthen security, and improve system bring-up and validation. You will combine hands-on engineering with technical leadership, architectural decision-making, code reviews, and mentorship. This fully remote opportunity is suited to an experienced firmware architect who enjoys tackling low-level silicon challenges and using AI-assisted engineering tools to accelerate development while maintaining rigorous quality standards.
Accountabilities:
You will own key elements of the embedded firmware architecture, ensuring that management firmware securely provisions, initializes, monitors, and updates on-chip acceleration engines. You will also establish engineering standards and guide technical execution across the platform.
Firmware Architecture and Development:
Architect, design, and implement bare-metal C firmware running on a RISC-V management core to provision, boot, and supervise arrays of on-chip acceleration engines.
Secure Firmware Loading:
Develop and maintain the secure firmware-loading pipeline, including fetching images from flash, coordinating authentication through hardware root-of-trust mechanisms, and distributing verified images into individual engines' local memories using on-chip fan-out and DMA hardware.
Engine Initialization and Health Monitoring:
Implement per-engine bring-up, reset sequencing, and health validation through control and status registers, with robust timeout handling, error recovery, and enforced security invariants.
Multi-Engine and Multi-Die Support:
Scale firmware distribution and initialization across numerous engines and multiple dies, supporting runtime rebooting and in-field firmware updates.
Hardware/Software Interface Definition:
Define and maintain hardware/software contracts with ASIC and RTL teams using a datamodel-first workflow and tools such as SystemRDL, Kaitai, and YAML-based code generation.
Firmware Validation and Testing:
Validate firmware using functional simulators such as QEMU, supported by automated unit and integration tests.
AI-Assisted Engineering:
Integrate AI tools into firmware design, implementation, debugging, and testing workflows while ensuring generated code and recommendations are rigorously reviewed and validated.
Technical Leadership:
Establish architecture and coding standards, lead design and code reviews, make key technical decisions, and mentor engineers across the team.
Cross-Functional Collaboration:
Work closely with silicon, hardware, and software engineering teams to resolve integration challenges and deliver secure, reliable, production-ready firmware.
Requirements:
You are a seasoned embedded firmware engineer with deep expertise in low-level software, silicon bring-up, and secure firmware architecture. You bring strong technical judgment, a track record of leading complex engineering initiatives, and the ability to use AI-assisted development tools effectively without compromising reliability or security.
Professional Experience:
10 or more years of embedded systems or firmware engineering experience, including software architecture ownership and technical leadership.
C Programming:
Expert-level proficiency in C; C++ experience is an advantage.
Python:
Working knowledge of Python for scripting, automation, testing, and development support.
Bare-Metal Firmware:
Extensive hands-on experience developing bare-metal firmware for constrained processing cores, including low-level hardware initialization and manual management of local memories.
Secure Boot and Authentication:
Experience implementing secure boot or firmware image authentication and integrating hardware root-of-trust mechanisms.
Register-Level Hardware Interfaces:
Proven experience programming control and status registers (CSRs) and collaborating with silicon engineering teams to design register-level interfaces.
AI-Assisted Development:
Demonstrated practical proficiency with AI-assisted engineering tools, together with the technical judgment to verify generated code, identify errors, and validate results.
RISC-V Expertise:
Experience with RISC-V firmware development and toolchains is preferred.
Accelerator Firmware:
Familiarity with firmware orchestration across multicore or multi-engine accelerator arrays is an advantage.
Hardware Security Technologies:
Knowledge of hardware root-of-trust ecosystems such as Caliptra, along with SHA-2 hashing and digital signature verification, is desirable.
Code Generation and Co-Verification:
Familiarity with tools and workflows such as SystemRDL, Kaitai, CMake, and simulator-based hardware/software co-verification is preferred.
AI/HPC Networking:
Knowledge of emerging interconnect standards such as Ultra Ethernet Consortium (UEC), UALink, and ESUN is an advantage.
Networking and HPC Background:
Experience with high-performance computing, AI networking, RDMA, or libfabric is beneficial.
Technical Leadership and Communication:
Ability to make sound architectural decisions, review complex designs, mentor engineers, and collaborate effectively across hardware and software disciplines.
Remote Work:
Ability to work remotely while residing within the United States.
Benefits:
Competitive compensation:
A comprehensive total rewards package combining base salary, equity, and performance-based incentives.
Individualized base pay:
Salary determined by skills, qualifications, experience, and geographic location relative to the hiring range.
Performance incentives:
Eligibility for an annual bonus or other incentives, depending on the role.
Medical coverage:
Medical, dental, and vision insurance.
Insurance protection:
Disability and life insurance, plus accidental injury insurance.
Additional coverage:
Dependent care flexible spending account and pet insurance.
Retirement savings:
401(k) plan with employer matching contributions.
Paid time off:
Generous paid holidays and Open Time Off (OTO) for regular full-time exempt employees.
Additional leave:
Sick time, bonding leave, and pregnancy disability leave.
Flexible work environment:
Fully remote work for employees residing in the United States.
Industry collaboration:
Opportunities to work with influential organizations and experts across the semiconductor industry.
Innovative engineering environment:
The opportunity to contribute to advanced AI and HPC networking technologies within a collaborative, technically ambitious team.
Equal opportunity:
A commitment to fair employment practices, reasonable accommodations throughout the recruitment process, and consideration of all qualified applicants.