Lead system architecture exploration with a focus on power delivery and thermal management.
Drive innovation in vertical power delivery to the wafer, enabling ultra-high current density solutions.
Collaborate with internal product, ASIC, and systems teams to define and refine detailed power specifications.
Architect power delivery systems optimized for both electrical performance and cooling efficiency.
Evaluate and select optimal architectures and strategic partners/vendors for new technology development.
Oversee the full lifecycle of power delivery solutions—from concept through production deployment.
Collaborate with package, silicon, PCB, and mechanical to optimize power delivery
Minimum Qualifications
MSEE or MSCE required; PhD preferred or equivalent industry experience.
15+ years of hands-on experience in power delivery systems.
Strong foundation in energy-efficient system design and associated trade-offs.
Practical experience in thermal modeling and cooling solution implementation.
High-current, low-voltage power delivery for advanced silicon
Experience with multiphase buck regulators, digital power controllers, DrMOS, smart power stages, and integrated voltage regulators
Excellent interpersonal skills and a collaborative mindset.
Experience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc.
Preferred Qualifications
Demonstrated expertise in DC-DC power conversion, including control loops, power management, magnetics, and filter design.
Solid background in semiconductor technologies, including PMICs and integrated power modules.
Deep technical knowledge of magnetic components, particularly in custom inductor design.
Experience in developing advanced power modules with optimized thermal and magnetic characteristics.
Experience on package PDN design, power vias, bumps, interposers, substrates, and ASIC power delivery structure
Deep expertise on power architecture for chiplet-based designs, IVRs, advanced packages, or 2.5D/3D integration