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LeadOfficeBristol; Cambridge

Director of Silicon Logical Design

G
Graphcore
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Lead
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Office
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Описание вакансии

About the company

Graphcore builds the future of AI compute — a team of semiconductor, software and AI experts creating the complete AI compute stack, from silicon and software to datacenter-scale infrastructure. Part of the SoftBank Group.

Responsibilities

  • Define and execute the strategic roadmap for Logical Design aligned with Graphcore's silicon and product strategy
  • Lead, grow and mentor a high-performing RTL/micro-architecture design organisation
  • Establish best-in-class design methodologies, documentation standards and quality metrics
  • Provide technical oversight of micro-architecture specification and RTL development across major blocks and subsystems
  • Guide architectural feasibility studies and micro-architecture definition
  • Oversee integration of third-party IP, complex ASIC blocks and high-performance custom designs
  • Ensure robust design sign-off through linting, synthesis, CDC/RDC, timing closure and coverage metrics
  • Partner with Physical Design, Verification, DFT, Architecture and Program Management teams
  • Own delivery of high-quality, on-schedule RTL for multiple parallel silicon programs
  • Champion design automation and infrastructure improvements

Requirements

  • Degree in Computer Science, Electrical Engineering or related field; advanced degree preferred
  • Extensive experience in digital logical design, micro-architecture and RTL development for large-scale high-performance silicon
  • Proven success leading and developing technical teams in a semiconductor environment
  • Deep expertise in SystemVerilog or VHDL and modern digital design flows
  • Strong ability to diagnose and resolve complex design issues, including scripting (Python, Tcl)
  • Demonstrated cross-functional leadership and communication across global teams
  • Desirable: processor/accelerator micro-architecture, high-speed serial interfaces, arithmetic pipeline design, advanced synthesis/timing/power analysis, DFT methodologies, silicon bring-up and post-silicon validation

Conditions

  • Competitive salary, flexible working, generous annual leave
  • Private medical insurance, dental plan, pension (matched up to 5%), life assurance and income protection
  • Generous parental leave and employee assistance programme
Стек и навыки

С чем работаем