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SeniorHybridSan Francisco

PCB Layout Engineer

O
OpenAI
Уровень
Senior
Формат
Hybrid
О роли

Описание вакансии

About the Team

Our Robotics team is focused on unlocking general-purpose robotics and advancing toward AGI-level intelligence in dynamic, real-world environments. Working across the full model and systems stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the physical constraints of real-world systems to improve people’s lives.

About the Role

We are looking for a PCB Layout Engineer to design high-density electronics for next-generation robotic systems. You will own PCB layout from floor planning through fabrication release, working closely with electrical, SI/PI, mechanical, and manufacturing teams.

This role is based in San Francisco and requires in-person presence four days per week.

Responsibilities
  • Own PCB layout, component placement, routing, and fabrication release for complex robotic systems.
  • Collaborate with SI/PI engineers to refine layouts based on simulation results.
  • Implement high-speed routing, controlled impedance, power distribution, decoupling, grounding, EMI/EMC, thermal, and mechanical-integration requirements.
  • Work directly with fabricators and assembly partners to define stack-ups, establish design rules, drive DFM/DFA/DFT reviews, and close findings before release.
  • Prepare fabrication and assembly documentation, including drawings, ODB++, drill files, stack-up tables, and manufacturing notes.
  • Inspect newly received PCBAs and participate in board-level manufacturing failure analysis.
  • Contribute to reusable design constraints and layout workflows, and maintain component-library assets such as symbols, footprints, and 3D models.
Requirements
  • Have 6+ years of experience designing complex, multilayer PCBs.
  • Are fluent in Cadence Allegro PCB Designer and Constraint Manager.
  • Have strong HDI design experience, including fine-pitch BGAs, microvias, blind and buried vias, via-in-pad, and sequential lamination.
  • Understand signal and power integrity fundamentals, including return paths, differential pairs, length matching, crosstalk, and power delivery.
  • Have experience working with PCB fabricators on stack-up development, manufacturing constraints, and DFM.
  • Communicate effectively across engineering disciplines and with external manufacturing partners.

Preferred qualifications:

  • Experience with rigid-flex boards or other mechanically constrained designs.
  • Experience routing PCIe, DDR, USB, Ethernet, MIPI, or similar high-speed interfaces.
  • Familiarity with SI/PI simulation tools such as Cadence Sigrity or Ansys SIwave.
  • Experience laying out power supplies or other power-electronics circuits or mixed-signal systems.
  • Familiarity with IPC standards, Cadence SKILL scripting, or layout automation.
Стек и навыки

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